Corporate Identity Jobs in Ho Chi Minh City

ACG2438JOBOur client is a topnotch fintech company who is looking for a qualified candidate to join their firm.PR Content & Media RelationsDevelop and execute PR strategies to enhance the company s brand reputation and visibility in the market.Oversee the creation of highquality More...

Essential Duties and Responsibilities (Key Activities of the role)Brand Be fully conversant with the brand its standards and its DNA (visual and written communication product service distribution e.g. brand Packages) Manage brand compliance for the hotel to grow the equity of the hot More...

Brand Marketing:Ensure a comprehensive understanding of the Groups brands standards and DNA preserving brand integrity in all communications and identity elements.Serve as the custodian for all associated brand elements including communications products and services focusing on drivin More...

Brand Marketing:Ensure a comprehensive understanding of the Groups brands standards and DNA preserving brand integrity in all communications and identity elements.Serve as the custodian for all associated brand elements including communications products and services focusing on drivin More...

Your New Roles:Application monitoring to ensure stable and optimal performance always.Have ability to understand and reasonably resolve basic and complex technical problems.Have ability to work under pressure prioritize and manage multiple tasks.Good Teamplayer with strong Interperson More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Static timing analysis and timing closure (TOP and block). Propose technical solution to enhance the design from RTL to GDS to achieve timing closure. Collaborate with FE/BE teams to finish chip design within definited schedule.Qualifications : Bachelor or Master Degree in Informat More...

Our team is performing design for system IP (such as CPG SYSC) as the below steps: Make DRBFM target specification implementation specification. Understand clock/reset/power structure for whole SoC to generate/coding full or a part of IP. Understand to create timing constraint for IP More...

Define DFT strategy architecture and provide technical guideline for DFT design & verificationPerform DFT design and verification (MBIST SCAN LBIST...)DFT mode SDC (timing constraint) develop & analysis.Analyze & improve test coverage test time reduce area/timing/routing c More...

Define DFT strategy architecture and provide technical guideline for DFT design & verificationPerform DFT design and verification (MBIST SCAN LBIST...)DFT mode SDC (timing constraint) develop & analysis.Analyze & improve test coverage test time reduce area/timing/routing c More...

Define DFT strategy architecture and provide technical guideline for DFT design & verificationPerform DFT design and verification (MBIST SCAN LBIST...)DFT mode SDC (timing constraint) develop & analysis.Analyze & improve test coverage test time reduce area/timing/routing c More...