Corporate Identity Jobs in Ho Chi Minh City

Define DFT strategy architecture and provide technical guideline for DFT design & verificationPerform DFT design and verification (MBIST SCAN LBIST...)DFT mode SDC (timing constraint) develop & analysis.Analyze & improve test coverage test time reduce area/timing/routing c More...

Define DFT strategy architecture and provide technical guideline for DFT design & verificationPerform DFT design and verification (MBIST SCAN LBIST...)DFT mode SDC (timing constraint) develop & analysis.Analyze & improve test coverage test time reduce area/timing/routing c More...

ACG2444JOBOur client is a topnotch financial services company who is looking for a qualified candidate to join their firm.Team Development: Recruit and build a strong investment banking team.Client Relations: Establish and nurture relationships with clients identifying opportunities t More...

Our team is performing design for system IP (such as CPG SYSC) as the below steps: Make DRBFM target specification implementation specification. Understand clock/reset/power structure for whole SoC to generate/coding full or a part of IP. Understand to create timing constraint for IP More...

Our team is performing design for system IP (such as CPG SYSC) as the below steps: Make DRBFM target specification implementation specification. Understand clock/reset/power structure for whole SoC to generate/coding full or a part of IP. Understand to create timing constraint for IP More...

Our team is performing design for system IP (such as CPG SYSC) as the below steps: Make DRBFM target specification implementation specification. Understand clock/reset/power structure for whole SoC to generate/coding full or a part of IP. Understand to create timing constraint for IP More...

Define DFT strategy architecture and provide technical guideline for DFT design & verificationPerform DFT design and verification (MBIST SCAN LBIST...)DFT mode SDC (timing constraint) develop & analysis.Analyze & improve test coverage test time reduce area/timing/routing c More...

Our team guarantee Gate netlist and SDC (Synopsys Design Constraint) qualification for Automotive SoCs. Our responsibility includes : RTL/Netlist qualification: Perform LSI ChipTop netlist check such as VC Spyglass CDC Renesas In House Tool such as FalseCheck for asynchoronus design M More...

Our team guarantee Gate netlist and SDC (Synopsys Design Constraint) qualification for Automotive SoCs. Our responsibility includes : RTL/Netlist qualification: Perform LSI ChipTop netlist check such as VC Spyglass CDC Renesas In House Tool such as FalseCheck for asynchoronus design M More...

Job description: We are seeking a highly motivated and experienced SoC Design Verification Manager to join our team. In this role you will manage and lead a team to contribute to the verification of complex SystemonChip (SoC) designs ensuring functionality performance and quality More...

Our team guarantee Gate netlist and SDC (Synopsys Design Constraint) qualification for Automotive SoCs. Our responsibility includes : RTL/Netlist qualification: Perform LSI ChipTop netlist check such as VC Spyglass CDC Renesas In House Tool such as FalseCheck for asynchoronus design M More...

Job description: We are seeking a highly motivated and experienced SoC Design Verification Manager to join our team. In this role you will manage and lead a team to contribute to the verification of complex SystemonChip (SoC) designs ensuring functionality performance and quality More...

Our team guarantee Gate netlist and SDC (Synopsys Design Constraint) qualification for Automotive SoCs. Our responsibility includes : RTL/Netlist qualification: Perform LSI ChipTop netlist check such as VC Spyglass CDC Renesas In House Tool such as FalseCheck for asynchoronus design M More...

Our team guarantee Gate netlist and SDC (Synopsys Design Constraint) qualification for Automotive SoCs. Our responsibility includes : RTL/Netlist qualification: Perform LSI ChipTop netlist check such as VC Spyglass CDC Renesas In House Tool such as FalseCheck for asynchoronus design M More...

Our team guarantee Gate netlist and SDC (Synopsys Design Constraint) qualification for Automotive SoCs. Our responsibility includes : RTL/Netlist qualification: Perform LSI ChipTop netlist check such as VC Spyglass CDC Renesas In House Tool such as FalseCheck for asynchoronus design M More...

With the growth and expansion of Sucafinas business in Vietnam and each aspect of the business needing to be appropriately registered in the companies IRC and ERC we want to recruit a Legal & Regulatory Specialist.  The job holder will serve as a trusted advisor to senior man More...

Job description:We are seeking a highly motivated and experienced Senior SoC Design Verification Engineer to join our team. In this role you will lead and contribute to the verification of complex SystemonChip (SoC) designs ensuring functionality performance and quality meet project a More...

Job description:We are seeking a highly motivated and experienced Senior SoC Design Verification Engineer to join our team. In this role you will lead and contribute to the verification of complex SystemonChip (SoC) designs ensuring functionality performance and quality meet project a More...

Job description:We are seeking a highly motivated and experienced Senior SoC Design Verification Engineer to join our team. In this role you will lead and contribute to the verification of complex SystemonChip (SoC) designs ensuring functionality performance and quality meet project a More...

Job description:We are seeking a highly motivated and experienced Senior SoC Design Verification Engineer to join our team. In this role you will lead and contribute to the verification of complex SystemonChip (SoC) designs ensuring functionality performance and quality meet project a More...