Job description
You will be part of a team responsible for I/O IP development focused on digital I/O libraries RF I/O libraries and HV ESD protection. You will have the responsibility for the conception design maintenance and further development of ESD protection structures and IO pad libraries.
Your Role:
- Implement state of the art ESD and latchup protection concepts.
- Development of the digital RF or HV I/O library concept including considerations for ESD and latchup robust pad cell design.
- Generate frontend and backend views for I/O pad libraries.
- Apply layout best practice to get the most optimal performance I/O pad cell design within the minimal area.
- I/O pad library physical verification characterization and documentation.
Your Profile:
- Bachelors degree in electrical engineering or a comparable discipline.
- Applications from graduates are welcome relevant work experience is an advantage.
- Experience in electronic ASIC design (incl. design simulation layout and verification) using EDA environments such as Cadence Mentor etc. is welcome.
- Teamwork and collaboration skills working within multinational multisite team.
- You are reliable and independent structured and enthusiastic in your way of work.
- Good communication skills good written and spoken knowledge of German and English language round up your profile.
Job Type: Fulltime
Remote Work :
No