drjobs Technologist - AnalogMixed-Signal CAD Development Engineer

Technologist - AnalogMixed-Signal CAD Development Engineer

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1 Vacancy
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Job Location drjobs

San Jose, CA - USA

Monthly Salary drjobs

Not Disclosed

drjobs

Salary Not Disclosed

Vacancy

1 Vacancy

Job Description

ESSENTIAL DUTIES AND RESPONSIBILITIES 

  • You will be responsible for the further development of concepts and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes.
  • Solid understanding of PDKs effectively manage PDK libraries collaterals and drive migration of design environments for incremental releases.
  • Development of Calibre Physical Verification decks for cmos PLANAR and FINFET technologies including DRC LVS PERC FILL LPE and shape generation decks and scripts.
  • Layout Automation and Utilities development in Cadence SKILL/SKILL.
  • Development and validation of PV tools and flows like parasitic extraction EMIR drop and substrate noise analysis.
  • Responsibilities will include testing validation customer support and new tool/methods evaluations development of methods and procedures for quality improvement automation of deck/techFiles generation and validation.
  • Experience with Cadence custom IC Virtuoso platform to create layout test structures to validate verification rules and to troubleshoot errors.
  • Experience with physical verification tools for DRC LVS and parasitic extraction Calibre starRC ICV etc is plus.
  • Working knowledge of revision control software (Git Perforce Subversion Synchronicity etc)
  • Collaboration with the IT team to fulfil advanced nodes specific requests (Linux ExceedonDemand Grid VMWareESX Storagesystem etc.).
  • Ensuring the operation and support within the CAD / ITteam for all ASIC designers worldwide.
  • Managing the quality and ISO26262 requirements for the EDA tools both for inhouse developments and vendor products

Qualifications :

REQUIRED

  • BSEE with 10 years of experience in CAD development Or CAD Support
  • Must have experience in 40nm and below full CMOS technology
  • Must have thorough knowledge of industry standard EDA tools (Cadence Mentor etc.)

SKILLS

  • Must have Experience working with distributed design teams a plus
  • Must possess strong written and verbal communication skills


Additional Information :

Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate against any applicant or employee based on their race color ancestry religion (including religious dress and grooming standards) sex (including pregnancy childbirth or related medical conditions breastfeeding or related medical conditions) gender (including a persons gender identity gender expression and genderrelated appearance and behavior whether or not stereotypically associated with the persons assigned sex at birth) age national origin sexual orientation medical condition marital status (including domestic partnership status) physical disability mental disability medical condition genetic information protected medical and family care leave Civil Air Patrol status military and veteran status or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our nondiscrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Know Your Rights: Workplace Discrimination is Illegal poster. Our pay transparency policy is available here.

Western Digital thrives on the power and potential of diversity. As a global company we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees our company our customers and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging respect and contribution.

Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at to advise us of your accommodation request. In your email please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.

Based on our experience we anticipate that the application deadline will be 01/14/2025 (3 months from posting) although we reserve the right to close the application process sooner if we hire an applicant for this position before the application deadline. If we are not able to hire someone from this role before the application deadline we will update this posting with a new anticipated application deadline.

#LITD1

Compensation & Benefits Details


Remote Work :

No


Employment Type :

Fulltime

Employment Type

Full-time

About Company

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