STA Engineer
STA Engineer
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Overview:
Required Qualifications:
- Bachelors degree in Electrical Engineering Computer Engineering or related field
- Strong understanding of digital design concepts
- Proficiency in Verilog and SystemVerilog
- Experience with ASIC verification and timing closure
- Knowledge of Static Timing Analysis (STA) tools and methodologies
- Familiarity with scripting in Perl Tcl or Python
- Ability to work effectively in a team environment
- Excellent problemsolving and analytical skills
- Good understanding of timing exceptions and constraints
- Experience with industrystandard EDA tools such as Synopsys Cadence or Mentor Graphics
- Strong communication and documentation skills
static timing analysis (sta) tools,cadence,timing closure,synopsys,communication skills,timing constraints generation,documentation skills,mentor graphics,asic verification,constraints,industry-standard eda tools,systemverilog,team environment,rtl design,python,skills,scripting in perl,tempus tools,verilog,tcl,static timing analysis,timing exceptions,problem-solving
Employment Type
Full Time
Company Industry
Key Skills
- ASP.NET
- Health Education
- Fashion Designing
- Fiber
- Investigation
