Memory Layout Engineer
Memory Layout Engineer
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5years
Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
Experience 5 years
- We expect you to have basic understanding of CMOS Transistors their behaviors.
- We expect some basic understanding of CMOS logic design and layout.
- Understanding of Power versus Performance versus Area tradeoffs in typical CMOS design.
- You have an engineering demeanor and Passion for Circuit layouts.
- Expected to have good interpersonal skills.
- Capable of creating high quality design rule driven layout
- Able to review schematics with engineering and propose changes based on layout implications.
- Exploring possible floor planning options and proposing improvements
- Minimum 5Yrs of experience in SRAM / memory layouts creation and backend verifications including EMIR analysis.
Nice To Have Skills and Experience :
- You know basic scripting languages e.g. Perl/skill.
- Some Experience of working on Cadence or Synopsys flows.
Job Type: Fulltime
Work Location: In person
Employment Type
Full Time
