Design Verification Engineer

This position is for a Sr. Failure Analysis Engineer. (OnSite 5 days/week)

Primary Tasks:

• Drive returned product Failure Analysis characterizing failures and escalating issues and trends to the Hardware Quality Engineering team
• Resolve escalated RMAs by determining the hardware root cause of the failure issue.
• Track and report on RMA failure trends by product and cause to the Tech Ops team.
• Track the progress of all inprogress RMAs requiring FA and prioritizing accordingly.
• Monitor process and product corrective actions to ensure changes were in fact effective in improving the product.
• Maintain accurate data entry into SAP and Salesforce database tools.

Skills:

• Expert technical skills in the manufacturing test environment both PCBA and box build/system level assemblies.

• Strong Linux system administration knowledge.

• Outstanding communication skills both written and verbal.

• A highly collaborative working style is a must.

• Moderate to fluent in programming languages and tools used for the test environment (Linux OS Tcl Expect Shell Script Python Network Switch Terminal Server and PDU)

• Ability to apply a working knowledge of server/client and IP based networking hardware architecture both system and component level to the test environment.

• Demonstrated ability at hardware debugging to component level and fault isolation is mandatory.

• Familiarity with test engineering principles methods and industry standard best practices in a manufacturing test environment including JTAG boundary scan 2corner and 4corner testing.
• Knowledge of SalesforceJIRA and SAP desired.
• Ability to read schematics and view board files (Allegro Viewer and Cadence PCB Design)

Education

• Minimum BSEE BSCS BSCE or BSET.
• 10 years related experience required in the computer networking industry.