Role: Senior Manager IO Design Memory Technology
Competencies:
- Bachelors/Masters degree in Electronics & Telecommunication/Electrical engineering (VLSI Design)
- Extensive Handson design experience in IO Design(LVCMOS HVCMOS DDR LVDS)
- 15 years of Experience on handling IO designs projects working with BU Stake holders
- NAND Flash Design knowledge is plus
- Expertise in ESD Powerbus Floor plan Layout guidelines
- Expertise knowledge of advanced DDR algorithms : Training modes and DFE/CTLE/Compensation Techniques Clock skew techniques
- Management and Lead experience to handle Team of IO engineers
- Experience in working with cross geo cross team functions and stake holder management
- Expertise with package/board/Power integrity /signal integrity constraints is a plus.
- Strong communication skills & circuit design knowledge is preferred.
- Tool knowledge: spice tools: finesim hspice & other flows
Good to have:
- Lead team of experienced IO Design Engineers
- Strategic development of next generation IO for scaling speed
- Build Best in Class IP Design
- Handling BU communication on all IO Roadmap RMA FA
- Drive E/E IO Design capability and execution till Silicon to Productization
Qualifications :
B.TECH/M.TECH in Electrical/Electronics/VLSI/Microelectronics with 15 years of experience
Remote Work :
No
Employment Type :
Fulltime