Principal Engineer ASIC Development Engineering
Principal Engineer ASIC Development Engineering
Employer Active
Job Alert
You will be updated with latest job alerts via email
Share
Job Alert
You will be updated with latest job alerts via email
Job Description
The SoC Development team is seeking highly motivated engineers to join a team of experienced engineers working on the development of controller SoCs.
As a Verification Engineer in SoC Development Team you will develop testplans and tests for use in testing complex System On Chip (SoC) ASICs. Your work will enable industryleading data storage control SoCs that get deployed into high volume consumer and enterprise products.
The growing diversity of data creates an exponential number of new possibilities for the world our company and you. Youll be part of a team driving the innovations necessary to outpace new demands and challenges everywhere data lives from sensors to mobile devices to the cloud. Weve only started to scratch the surface of what data can do. You can help unlock its full potential.
Essential Duties and Responsibilities:
- Responsible for driving verification strategy creating Test Plans and developing Test Benches for SoC.
- Collaborate with architects designers preand postsilicon verification teams to develop test plans
- Responsible to develop Cbased tests on SoC. Processor knowledge is a plus.
- Define and meet all functional coverage goals
- Run and debug gatelevel simulations
- Understanding and generation of functional patterns for ATE
Qualifications :
Required:
- BE or MS degree in Electrical Engineering or Computer Engineering with 9 to 13 years of experience
- Deep understanding of C System Verilog UVM and coverage driven verification methodology
- History of building and improving UVM based verification methodology
Skills:
- Develop and execute verification plans
- Proficiency with C Verilog & System Verilog and verification
- Experience in implementing advanced test benches verification models scoreboards/checkers.
- Knowledge in bus protocols APB AHB AXI and bus interconnects
- Good Programming/Scripting skills with languages such as Python Perl TCL and BASH
- Experience with test plan creation and testbench development
- Experience with test development and test coverage assessment
- Excellent debugging and problemsolving skill
- Knowledge in various interfaces PCIe DP UART I2C I2S SPI USB SD
- Create and modify SoClevel and subsystem level test benches.
- Experience in setting up and running gatelevel simulations
- Gate Level / PowerAware simulations
- Great written and verbal communication skills
- Interest in ASICs SoCs hard disk drives flash memory semiconductor components
- Strong team player who can collaborate with colleagues
Additional Information :
Because Western Digital thrives on the power of diversity and is committed to an inclusive environment where every individual can thrive through a sense of belonging respect and contribution we are committed to giving every qualified applicant and employee an equal opportunity. Western Digital does not discriminate against any applicant or employee based on their protected class status and complies with all federal and state laws against discrimination harassment and retaliation as well as the laws and regulations set forth in the Equal Employment Opportunity is the Law poster.
Remote Work :
No
Employment Type :
Fulltime
Employment Type
Full-time
