FPGA UVM Verification Engineer
FPGA UVM Verification Engineer
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Job Description
Job Title: FPGA UVM Verification Engineer
Location: Phoenix AZ
Onsite: Day 1
Rate: $120k/ Fulltime
Job Description:
We are seeking an experienced FPGA UVM Verification Engineer to join our team in Phoenix AZ. This position is available to GC and USC candidates only.
Qualifications:
- Bachelors degree in a technical discipline such as sciences technology engineering or mathematics from an accredited institution.
- 2 years of FPGA Design or Verification experience.
- Degree in Electrical Engineering or Computer Engineering.
Technical Skills:
- Strong experience in VHDL Xilinx FPGA/SOC development and ASICs.
- Proficiency in software coding preferably using C.
- MATLAB/Simulink design and simulation skills.
- Some LabVIEW experience.
- Expertise in scripting languages (e.g. Perl Shell TCL).
- Familiarity with simulators STA tools synthesis and routing tools AMBA I2C and SPI protocols.
MatchPoint Solutions provides equal employment opportunities to all employees and applicants for employment and prohibits discrimination and harassment of any type without regard to race color religion age sex national origin disability status genetics protected veteran status sexual orientation gender identity or expression or any other characteristic protected by federal state or local laws.
This policy applies to all terms and conditions of employment including recruiting hiring placement promotion termination layoff recall transfer leaves of absence compensation and training.
Employment Type
Full Time
