Position Summary:
A renowned renowned broadband analog group in California is looking to hire a Principal Analog MixedSignal Design Engineer. The engineer will contribute directly to developing bestinclass optical interface chips driving innovation in AI and hyperscaler data centers. This is a fulltime position with flexibility to work 2 days onsite at the beautiful Westlake Village CA location. The group is offering a competitive rate of $145K$200K yearly among other generous benefits such as a target annual bonus of 17% new hire and annual equity grants relocation assistance and other comprehensive benefits.
Key Responsibilities:
- Lead the design of cuttingedge Transimpedance Amplifiers (TIAs) in SiGe BiCMOS technology achieving industryleading performance.
- Develop highperformance broadband analog circuits for optical frontend receivers.
- Design transmission line and millimeterwave structures to push performance boundaries.
- Implement precision analog circuits such as linear regulators AGC loops and bandgaps.
- Define microarchitecture for major circuit blocks and guide design teams through implementation.
- Work crossfunctionally to ensure postsilicon validation qualification and transition to mass production.
- Provide technical leadership mentoring junior designers and translating chiplevel specifications into actionable designs.
- Act as a chip lead overseeing projects from concept to production.
Qualifications:
- Bachelors in Electrical Engineering with 10 15 years of experience in highperformance RF/Analog Receiver/TIA design or
- Masters or Ph.D. in Electrical Engineering with 5 years of relevant experience.
- Proven IC design expertise including successful chip tapeouts and lab evaluation.
- Deep knowledge of transistorlevel design device physics and feedback loop stability analysis.
- Proficiency with EDA CAD tools custom analog layouts and debugging to correlate simulation with measurements.
- Strong understanding of SiGe BiCMOS and CMOS technologies.
- AGC loop design precision analog circuits (linear regulators bandgaps current sensors) and CTLE design. (Preferred)
- Experience in packagesystem integration. (Preferred)
- Teamoriented mindset with a track record of mentoring and leading design teams.
- Strong communication and documentation skills.
Work Schedule:
- Hybrid Full time schedule with a minimum of 2 days onsite.
Salary Range:
Benefits:
- Impactful Work
- Growth Opportunities
- 17% Target Annual Bonus
- Nationwide relocation assistance
- Other comprehensive benefits
Work Location:
- Hybrid onsite on Westlake Village CA location.