ASIC Digital Verification Engineer Lead
ASIC Digital Verification Engineer Lead
Posted on :
28-11-2024
Employer Active
1 Vacancy
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Job Description
Looking for 8 yrs of design verification Engineers with below skills
- RTL design (Verilog HDL)
- EDA verification experience (NC Verilog)
- Ability to use Microsoft Office software (Excel Word Outlook)
- Ability to use Linux CUI commands
- Experience with SV UVM and SystemVerilog Assertions (SVA)
- Experience using version control tools (Subversion git)
- Knowledge that would be beneficial
- AI Insights
- Ability to check timing reports during implementation
Roles & Responsibilities
- Under general supervision performs engineering work and applied research development and design of new Integrated Chips.
- Work includes Architectural Design Logic Design Circuit Design Physical Design Verification Fabrication Packaging of Chips
Language Requirement:
- Bilingual English and Japanese (N2 and above)
Employment Type
Full Time
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