Employer Active
Job Alert
You will be updated with latest job alerts via emailJob Alert
You will be updated with latest job alerts via emailPosition Name DFx Engineer
Type of hiring 12 Months
W2 or C2C
Location Remote
Job Description:
Create Verilog/System Verilog test benches to verify various DFT features in RTL such as SSN compressed and uncompressed scan memory BIST JTAG and boundary scan at block and SoClevel
Thanks & Regards
Nikhil Errapati
Resource specialist
Email Id:
Join the Referral Revolution of Yochana by Sharing Earning and Empowering!. Ask us about our rewarding Referral program.
Full Time