Design Engineer

Logic Design Engineer

San Jose CA. In this position you will design and test FPGA circuitry for nextgeneration products. Our client is a very well established organization offering a stable work environment and excellent benefits. This is an onsite position working with an outstanding technical team. If you have experience with FPGA development Verliog RTL Xilinx and serial communications protocols you may qualify for this great opportunity. Additional details and full description are available to qualified candidates.

Duties include:

• Design and define logic architecture of various blocks using Verilog and verify their block level functionality through simulation
• Document and review designs fix the RTL recompile the FPGA and review the changes with the team
• Drive FPGA tools to compile code and ensure timing closure
• Work with the verification engineers to validate your circuit in a whole chip simulation environment; verify via system level test with test hardware
• Work with customer support to reproduce and fix issues found in the field; reproduce customer environment for any field failures

Qualifications

Requirements include:

• BS in EE CS or Computer Engineering required. MSEE is a plus
• Knowledge of AMDXilinx Vivado and RTL simulation
• Experience with some protocols: PCIe CXL NVMe USB SAS SATA
• Experience with Monitoring and/or Test & Measurement tools
• Strong interpersonal organizational and communication skills
• Experience working both independently and in a teamoriented collaborative environment is essential
• 10 years of experience is preferred

Why is This a Great Opportunity

Great position in a market leading company. Outstanding technology and people. Great benefit package and work environment.