RTL Design Engineer - Senior US

For over 15 years Trilyon has been at the forefront of providing comprehensive global workforce solutions and staffing services. Leveraging our extensive expertise across multiple domains such as Cloud technology Salesforce AI Machine Learning and Technical Writing we consistently exceed expectations in catering to a wide range of requirements.

Currently we are seeking a RTL Design Engineer Senior (US) for one of our clients that is a leading multination corporation.

Position: RTL Design Engineer Senior (US)

Location: Onsite San Jose CA

Duration: 12 Months (Potential to be a contracttohire position)

JOB DUTIES:

• Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions.
• Responsible for linting and simulation of design.
• Work with synthesis and backend teams for physical implementation.

EDUCATION: Bachelors or Masters in Computer Engineering

KEY RESPONSIBILITIES:

• Perform RTL design of digital components in Verilog/systemverilog.
• Analyze/fix Lint and CDC errors of the components.
• Guarantee quality/timely deliverables meeting projects schedule.
• Help to improve/automate design process.

PREFERRED EXPERIENCE:

• Knowledge of RISKV processor integration Express
• Multiclock domain designs.
• Design constraints for synthesis and static timing analysis.
• Knowledge of AXI/AMBA protocol
• Knowledge of frontend RTL design tools and methodologies.
• Knowledge of scripting languages like Perl tcl or cshell