Physical design

Overview:

Key Responsibilities:

• Contribute to the physical design and implementation of complex digital blocks.
• Execute floor planning power planning and placement optimizations for optimal performance.
• Collaborate with RTL design and verification teams to ensure design objectives are met.
• Perform static timing analysis and timing closure for design signoff.
• Utilize EDA tools for physical design and timing closure.
• Generate and implement low power design techniques.
• Work on DFT (Design for Testability) and DFM (Design for Manufacturing) methodologies.
• Optimize designs for yield manufacturability and reliability.
• Conduct design reviews and provide relevant design documentation and reports.
• Support and contribute to the development of physical design methodologies and best practices.

Required Qualifications:

• Bachelors or Masters degree in Electrical Engineering Computer Engineering or related field.
• Proven experience in physical design and implementation of complex IC designs.
• Proficiency in RTL design synthesis and ASIC flow.
• Strong understanding of static timing analysis and timing closure techniques.
• Experience with EDA tools such as Synopsys Cadence or Mentor Graphics.
• Familiarity with low power design methodologies and techniques.
• Knowledge of DFT and DFM practices for IC designs.
• Excellent problemsolving and analytical skills.
• Ability to work collaboratively in a crossfunctional team environment.
• Strong verbal and written communication skills.

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