Roles and Responsibilities
Design of ASIC, custom ICs, and/or FPGAs
Responsible for RTL Design and Integration of complex digital IPs and ASICs
Define micro-architecture specifications, technical proposals, logic design and RTL
Assist verification team in developing Test plan and test coverage
Review coverage reports from regression tests and provide feedback to verification team
Assist post-silicon validation team in platform debugging
Assist physical design team in floorplan and static timing
Performs logic design, Register Transfer Level RTL coding, and drives imulation/emulation to make sure quality of the IP
Interact and participate in discussion with customer on IP integration and reviews Qualifications:
Hands on Experience with designing complex IP and SoC
Experience in AXI, DDR4, HBM, PCIe design is a plus
Must have multiple tape-out and Silicon bring-up experience
Experience in design of hardware accelerators, co-processors, memory controllers is an added advantage
Skills :