Role Autonomy SoC Platform System Engineer - Onsite
Role Autonomy SoC Platform System Engineer - Onsite
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1 Vacancy
Job Description
Autonomy SoC Platform System Engineer (Contractor)
Hand on experience with SOC bring up and SOC early development cycle
Work is from onsite at customer Palo Alto office
Role Summary
In this position within the Autonomy Hardware team you will bring up and validate the automotive SoC solutions build up validation and benchmark framework to identify gaps and risks at component module level. You will be collaborating with other cross functional teams in gathering all the test requirements conducting test sequences and collecting data troubleshoot issues and ensuring that the test results meet the performance requirements as specified by the architecture.
Requirements and Responsibility
Familiar with HW IP datasheets and user guides extract critical information regarding register access sequences expected operation sequences and their corresponding results including Register maps Timing diagrams Command sequences
Develop test vectors based on the specifications outlined in the datasheet. Consider valid and invalid input scenarios edge cases for register settings timing and sequence requirements; enhance the test vectors by incorporating variations in conditions (temperature voltage) to ensure robustness.
Conducting tests on hardware platforms. Utilize appropriate lab equipment (oscilloscopes logic analyzers) for testing. Employ debuggers to monitor register accesses and to trace execution paths during testing.
Gather data from tests noting any discrepancies from expected outcomes. Perform Function Validation by Assessing whether the observed results align with the expected results from the datasheet/user guides. Perform Failure Analysis and Identify potential root causes for any failures such as timing issues incorrect register settings or environmental factors.
Have a handson understanding of lowspeed IOs such as JTAG SPI I2C and UART including their communication sequences and IO protocols; Use HW and SW tools to probe these interfaces and verify correct operation during the bringup phase.
Utilize HW equipment such as oscilloscope and BERT to inspect eye diagrams bit error rate and other analog characteristics to assess signal integrity of highspeed IOs. Measure jitter noise loss etc. to ensure compliance with specifications.
Design and implement simple test fixtures using Reference design kits cables and connectors to facilitate testing of the hardware IP. Ensure the test fixture can accommodate various configurations to test different scenarios.
Nayak
Talent Acquisition Team Lead
1740 Grassland Parkway Ste 405 Alpharetta GA 30004
Phone/WhatsApp:/
Employment Type
Full Time
