Principal Engineer VLSI Design Engineering

The Memory Technology Group is at the core of the Legacy SanDisk Engineering Organization which Western Digital owns. We are building a cutting edge 3D memory in our multibillion dollars Fab. Our memory provides performance power and endurance at a lower cost without forgoing quality. The Memory Technology organization is a strategic entity for the company and we are constantly growing. Our group functions as a startup within Western Digital and offers a creative fast paced entrepreneurial work environment where youll be at the center of innovation.

We are looking for an experienced Staff Engineer to lead and deliver projects for our Memory Design team. This is a great opportunity for a resultsoriented entrepreneurial individual who knows how to work with nonvolatile memory worldclass engineers and has a great track record for delivering innovative results.
You will need to think creatively about the memory as we do take pride in our craftsmanship.  We do work together with all engineering teams to identify and execute on the most disciplined way. Your success will be measured by your ability to build great designs that deliver innovation that unlock revenue opportunities for the company.

Join the Memory Technology Design Team and become a leader of this highly motivated cooperative and focused team!

In this position the individual will be responsible for all aspects of digital design in NAND Flash memory focusing on micro architecture RTL design verification logic synthesis and timing analysis to deliver a design meeting target power performance and area goals.

ESSENTIAL DUTIES AND RESPONSIBILITIES: 

• RTL design and verification in Verilog RTL linting clock domain crossing (CDC) analysis design integration synthesis DFT timing analysis and closure
• Balance design tradeoffs with modularity scalability power area and performance.
• Interface with internal and external teams/customers to drive necessary technical specifications and features based on individual requirements
• Participating in PostSi evaluation and debug
• Drive cross function support for productization
• Technical guidance and mentoring of junior engineers

Qualifications :

REQUIRED:

• MSEE plus 6 years of relevant experience
• Experience with chip level integration chip lead and full product life cycle (requirements design implementation test) of Logic design
• Working knowledge of the entire Logic design flow from RTL to GDSII (RTL coding simulation synthesis static timing analysis logic equivalence DFT insertion placeandroute clock tree synthesis extraction static timing analysis physical verification)
• Working knowledge of NAND flash memory cell device operations algorithms for program/read/erase
• Excellent communication (written and verbal) and interpersonal skills

PREFERRED:

• Experience developing digital circuit designs for low power operating conditions
• Working knowledge of device physics and process
• Working knowledge of NAND Flash memory design including Analog Core Datapath and IO circuits
• Proficiency with following Digital design tools
  • Synthesis Synopsys Design Compiler Cadence Genus or Cadence RTL Compiler
  • Static Timing Synopsys Primetime or Cadence Tempus
  • Place and Route Synopsys ICC or Cadence Encounter or Innovus
• Familiarity with revision control tool and EDA standard formats used in cell/library development and modeling Liberty (timing model) SDC (Synopsys Design Constraints)
• Programming experience in C C Python or Perl

The ideal individual must have proven ability to achieve results in a fast moving dynamic environment. Selfmotivated and selfdirected however must have demonstrated ability to work well with people. A proven desire to work as a team member both on the same team and outside of the team. Ability to troubleshoot and analyze complex problems. Ability to multitask and meet deadlines. Excellent communication (written and verbal) and interpersonal skills.

Additional Information :

Western Digital is committed to providing equal opportunities to all applicants and employees and will not discriminate based on their race color ancestry religion (including religious dress and grooming standards) sex (including pregnancy childbirth or related medical conditions breastfeeding or related medical conditions) gender (including a persons gender identity gender expression and genderrelated appearance and behavior whether or not stereotypically associated with the persons assigned sex at birth) age national origin sexual orientation medical condition marital status (including domestic partnership status) physical disability mental disability medical condition genetic information protected medical and family care leave Civil Air Patrol status military and veteran status or other legally protected characteristics. We also prohibit harassment of any individual on any of the characteristics listed above. Our nondiscrimination policy applies to all aspects of employment. We comply with the laws and regulations set forth in the Equal Employment Opportunity is the Law poster.

Western Digital thrives on the power and potential of diversity. As a global company we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees our company our customers and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging respect and contribution.

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