Design Engineer-Full Chip leve-Minimum 8 years Required Jobs in Mega Cloud Lab in Any - India

Design Engineer-Full Chip leve-Minimum 8 years Required

Mega Cloud Lab

Posted on : 20-12-2024

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1 Vacancy

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Job Location

India

Salary

Not Disclosed

Salary Not Disclosed

Vacancy

1 Vacancy

Posted on : 20-12-2024

Job Description

Role : Design Engineer

Location : Santa Clara CA (Onsite)

Longterm Contract

810 years of design experience in developing synthesis constraint at module and Full Chip level

Experience in promoting subsystem level RDC/CDC constraint to SoC Top

Experience in debugging and triaging Lint CDC/RDC errors or issues

Experience in converting spyglass constraints to realintent constraints

Experience in creating lint RDC/CDC constraints both at IP level Fullchip or Top level

Experience in promoting IP level or SoC Constraints

810 years of design experience in developing synthesis constraint at module and Full Chip level

Experience in promoting subsystem level RDC/CDC constraint to SoC Top

Experience in debugging and triaging Lint CDC/RDC errors or issues

Experience in converting spyglass constraints to realintent constraints

Experience in creating lint RDC/CDC constraints both at IP level Fullchip or Top level

Experience in promoting IP level or SoC Constraints

creating lint rdc/cdc constraints,promoting ip level or soc constraints,cdc,design,design experience,converting spyglass constraints to realintent constraints,synthesis constraint development,rdc/cdc constraint promotion,rdc,debugging and triaging lint cdc/rdc errors,synthesis,soc,lint

Employment Type

Full Time

Company Industry

Key Skills

Mechanical Design
SOC
System Design
GD&T
CAD
Creo
SolidWorks
Mechanical Engineering
Perl
Autocad
HVAC Design
Catia

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About Company

Mega Cloud Lab

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Design Engineer-Full Chip leve-Minimum 8 years Required

Mega Cloud Lab

Job Description

Employment Type

Company Industry

Key Skills

About Company

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