Verilog Design Verification Engineer
Verilog Design Verification Engineer
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INR INR 3000000 - 7000000
1 Vacancy
Job Description
- BS or MS degree in Electrical Engineering or related field.
- 35 years of proven experience in hardware design development.
- Expertise in HDLs such as Verilog SystemVerilog VHDL and SystemC.
- Expertise in scripting frontend and verification workflows and integrations within the hardware design environment.
- Expertise in UVM environments
- Expertise in Formal Verification
- Expertise in Lint process and refinement
- Good communication skills in English
- Develop configure and customize the hardware design platform utilizing it to generate vital training data for enterprise LLMs.
- Liaise with research teams to translate requirements into actionable data insights directly impacting our LLMs performance.
- Uphold the highest standards in coding debugging and documentation ensuring the hardware design solutions are optimized for LLM training and benchmarking.
- Collaborate across teams to identify and prioritize needs contributing to the LLMs ability to understand and automate complex processes.
- BS or MS degree in Electrical Engineering or related field.
- 35 years of proven experience in hardware design development.
- Expertise in HDLs such as Verilog SystemVerilog VHDL and SystemC.
- Expertise in scripting frontend and verification workflows and integrations within the hardware design environment.
- Exceptional problemsolving communication and collaborative skills.Familiarity with ML and AI systems
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Employment Type
Full Time
Company Industry
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