SeniorStaffSenior Staff Principal Engineer - Physical Design PIPVPDN
SeniorStaffSenior Staff Principal Engineer - Physical Design PIPVPDN
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Job Description
Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer healthier greener and smarter world and our goal is to make every endpoint intelligent by offering product solutions in the automotive industrial infrastructure and IoT markets. Our robust product portfolio includes worldleading MCUs SoCs analog and power products plus Winning Combination solutions that curate these complementary products. We are a key supplier to the worlds leading manufacturers of electronics you rely on every day; you may not see our products but they are all around you.
Renesas employs roughly 21000 people in more than 30 countries worldwide. As a global team our employees actively embody the Renesas Culture our guiding principles based on five key elements: Transparent Agile Global Innovative and Entrepreneurial. Renesas believes in and has a commitment to diversity and inclusion with initiatives and a leadership team dedicated to its resources and values. At Renesas we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of whats next in electronics and the world.
Qualifications :
1. Physical Verification(PV) Skills:
- Full chip and Subsystem level PV run setup analysis & signoff
- Experience on PV signoff at lower tech nodes like 5nm 7nm 16nm etc
- Ability to debug PV issues in LVS DRC ERC ANTENNA ESDLUP etc
- Full Chip tapeout signoff from PV signoff is required
- Ability to drive PV methodology and Automation
2. PDN (IR drop & EM analysis) and Power Analysis Skills:
- Full chip and Subsystem level run setup analysis & signoff
- Power Analysis using PTPX
- Power Grid design and signoff
- Experience on PDN signoff at lower tech nodes like 5nm 7nm 16nm etc
- Ability to debug IREMPower issues independently
- Ability to drive PDN methodology and Automation
3. Physical Integration Skills:
- Chip Level Floorplanning Die and Power Estimation
- Padring (IORing) Design and Package signoff
- Analog Integration and Signoff
- Ability to drive PI methodology and Automation
- Knowledge of scripting languages such as Perl Python or TCL.
4. Experience:
- 3 15 years
Remote Work :
No
Employment Type :
Fulltime
Employment Type
Full-time
