Design-For-Test DFT Engineer
Design-For-Test DFT Engineer
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Not Disclosed
Salary Not Disclosed
1 Vacancy
Job Description
- Work with the Silicon teams to document the DFT specifications and define the requirements
- Develop and implement DFT architecture and infrastructure
- Develop and drive execution of enhanced DFX (DFT/DesignForDebug) methodologies with increased focus on debug support
- Generate structural test vectors analyze and improve coverage/test time/test cost
- Support DFT flow execution to implement and refine DFT solutions within hierarchical designs.
- Support DFT flow execution to verify DFT implementation and PE pattern delivery.
- Work with designers on STA physical power and logical issues impacting DFT
- Work with product engineering to bring up test vectors on silicon
- Work with product engineering bringup teams to bring up test vectors in the lab environment
- Manage schedules and support internal and external crossfunctional/crossorganizational engineering efforts
- A minimum of three years of experience with Hardware DesignForTest (DFT) engineering including
- A minimum of three years of experience in silicon design and/or verification
- Bachelors Degree or equivalent (12 years) work experience (If an Associates Degree with 6 years of work experience)
- Developing DFT specifications
- Industry standard DFT and design tools
- Debugging ATPG/MBIST patterns
- STA constraints and their interaction with DFT
- Experience with Root Cause Analysis
- IP / Top Scan insertion (all EDA solutions)
- IP / Top Mbist insertion (all EDA solutions)
- Scripting languages TCL/Perl/Python
- Experience with Synopsys DFT tools (Tetramax TestManager DFT compiler BSD compiler Formality Spyglass/Advisor)
- Experience with JTAG and IEEE standards 1149.1 and 1149.6.
Employment Type
Full Time
