Design Verification Engineer - Senior
Design Verification Engineer - Senior
Posted on :
03-12-2024
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1 Vacancy
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Job Description
Overview:
TekWissen is a global workforce management provider headquartered in Ann Arbor Michigan that offers strategic talent solutions to our clients worldwide. This Client is an American multinational semiconductor company based in Santa Clara California that develops computer processors and related technologies for business and consumer markets. global company that specializes in manufacturing semiconductor devices used in computer processing. The company also produces flash memories graphics processors motherboard chip sets and a variety of components used in consumer electronics goods.
Job Title: Design Verification Engineer Senior
Work Location: Ottawa ON
Duration: 12 Months
Work Type: Contract
Job Type: Onsite
Job Description:
THE ROLE:
- We are looking for an adaptive selfmotivative design verification engineer to join our growing team.
- As a key contributor you will be part of a leading team to drive and improve the clients abilities to deliver the highest quality industryleading technologies to market.
- The Verification Engineering team furthers and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.
THE PERSON:
- You have a passion for modern complex processor architecture digital design and verification in general.
- You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones.
- You have strong analytical and problemsolving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
- Develop/Maintain tests for functional verification with UVM verification at the subsystem level
- Build testbench components to support the next generation IP
- Maintain or improve current test libraries to support IP level testing
- Technically lead IPs in Control Fabric
- Have exposure to AXI protocol and Bootcode Verification
- Provide technical support to other teams
PREFERRED EXPERIENCE:
- Good at C/C
- Good at SV and UVM
- Good scripting knowledge in Perl Ruby and Makefile
- Familiarity with System Verilog and modern verification libraries like UVM
ACADEMIC CREDENTIALS:
- Bachelors or Masters degree in computer engineering/Electrical Engineering
- 5 years experience required
Top 2 priority skills:
- C/C code and SV and UVM
TekWissen Group is an equal opportunity employer supporting workforce diversity.
Employment Type
Full Time
Key Skills
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