ASIC RTL DESIGN LEAD
ASIC RTL DESIGN LEAD
Posted on :
11-04-2024
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1 Vacancy
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Job Description
Req ID : 2742025
Our client is looking for an ASIC (RTL) Design Lead. (Not FPGA Design)
Please share only immediate joiner resumes. Job Location Can be any of the following : BLR HYD CHENNAI NOIDA AHMEDABAD PUNE
RTL Design Lead :
- 1015 years of experience in ASIC design and SoC integration
- Good knowledge of PCIe HBM and Processor subsystem integration
- Lint CDC
- Constraint updation (IP to SoC level) Synthesis and timing analysis
- PD Support
Please share your profile if your profile is matching the above JD
We are currently seeking an experienced ASIC (RTL) Design Lead to join one of our esteemed clients teams. This is not an FPGA Design role. We are only considering candidates who are immediately available for hire. The job location could be any of the following: BLR HYD Chennai Noida Ahmedabad or Pune.The RTL Design Lead must have a mandatory skill set that includes 1015 years of experience in ASIC design and SoC integration. They should also have a good understanding of PCIe HBM and Processor subsystem integration. Additionally they should be proficient in Lint CDC constraint updation (IP to SoC level) synthesis and timing analysis. PD Support is also required.The ideal candidate should have experience working in a similar role for 10 to 15 years. If you believe your profile matches the job description please do not hesitate to share your resume with us. We look forward to hearing from you.
soc,integration,design,cdc,pcie,application-specific integrated circuits (asic),rtl design
Employment Type
Full Time
Key Skills
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