ASIC Failure Analysis Engineer

ASIC Failure Analysis Engineer

San Jose CA

• Bachelors in Electrical/Electronics Engineering or related required. Masters Preferred
• 5 years of experience in failure analysis field (preferably semiconductor).
• Semiconductor technology and process knowledge (Fab Assembly and Advanced Packaging).
• Experience of FA techniques like Cross sectioning Xray CSAM TDR FIB SEM and TEM is required.
• Fundamental knowledge of fault isolation technique ATE Scan/ATPG debug preferred.
• Good understanding of transistor functions and basic electronics.
• Knowledge of JEDEC IC Qualification tests and requirements is beneficial.
• Innovative and Creative with troubleshooting techniques.
• Enjoy handson work and working in a lab environment.