Preferred qualifications:
- Experience and understanding in engineering across timing analysis and design implementation.
- Experience in the delivery of high performance silicon in latest technology process nodes.
- Experience in extraction of design parameters, QoR metrics and analyzing data trends.
- Knowledge of semiconductor device physics and transistor characteristics.
- Understanding of Static Timing Analysis including sign-off corner definitions, process margining, interface timing constraints, high frequency timing convergence and setting up of frequency goals with technology scaling and PDK changes.
- Strong scripting and data mining skills.