Preferred qualifications:
- 3 years of experience on high-performance CPUs.
- Experience leading and delivering PPA metric driven projects convergence.
- Experience using Static Timing Analysis, power grid network delivery, and power analysis tools.
- Knowledge of CPU including iterations for timing and low-power microarchitecture, and implementation techniques for CPUs.
- Knowledge of computer architecture, logic design (RTL), and of Verilog/SystemVerilog.