Job Title: Analog Layout Engineer
Location: Santa Clara California
Job Description & Skill Requirement:
- 5 10yrs Exp range engineers Required Port schematics from the previous project
- Run prelayout simulations and implement ECOs to meet design targets
- Prepare and present PreLayout Design Review
- Guide layout engineer to implement the layout
- Run postlayout simulations and implement ECOs to meet design targets
- Prepare and present PostLayout Design Review
- Complete all necessary verification checks and prepare/present GOLD Exit Design Review
- Write RTL code to match analog changes
- Work with DV team to verify the RTL changes
- Work with physical design team to implement the RTL changes into netlist and work with the physical design team to close timing and gate level simulations
- Work on RTL and Schematic QA to meet the IP Closure milestones.