ASIC Design Verification Engineer

Full Remote Position.

The engineer can work remotely full time.

Responsibilities

• Participate in development of environments to verify RTL at block, unit, and SoC levels
• Write and execute tests according to verification plans
• Execute formal verification of block level RTL
• Participate in post-silicon verification

Minimum Qualifications

• B.S. or M.S. degree in Computer Engineering, Computer Science, or Electrical Engineering
• Experience in one or more Verification language (UVM, System Verilog)
• Experience in one or more scripting language (TCL, Python, Perl, Shell-scripting)
• Experience in testbench development
• Prior experience validating complex SoCs that include multiple clock and reset domains, clock gating, and power intent specified via UPF

Preferred Qualifications

• Development Bit Accurate and Transaction Accurate Modeling: experience inC/C++/System C