VLSI -Design Verification
VLSI -Design Verification
Posted on :
09-09-2024
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Job Description
Overview:
TekWissen Group is a workforce management provider throughout India and many other countries in the world. The below client represents the connected world offering innovative and customercentric information technology experiences
Position: VLSI Design Verification
Location: Bengaluru
Duration: Full Time
Job Description:
- VLSIFrontend
- DV
Top 5 Required Skills/Mandatory skills
- RTL and PARTL simulation.
- RTL debug
- GLS & PAGLS
- Coverage analysis
- Assertions Coding.
Required Education:
- Masters or Bachelors of Engineering.
Key Words:
- GLS & PAGLS
Roles & Responsibilities:
- GNSS subsystem IP verification.
- Runing RTL simulations creating new test vectors GLS & PAGLS.
TekWissen Group is an equal opportunity employer supporting workforce diversity.
Employment Type
Full Time
Key Skills
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