Experience in Signal Integrity.
Good knowledge on SI Fundamental issues and solutions.
Time Domain and Frequency Domain Analysis.
Overshoot/Undershoot Set up/Hold time Rise time Slew
rate (Sparameters extraction)Insertion/return loss
cross talk coupling Jitter analysis.
Via Optimization/Modeling.
Hands on experience on 3D EM Solvers.
Knowledge on IBIS and IBISAMI Models.
IR Drop Decap optimization Via/Plane current
density.
Hands on experience with Simulation tools such as
Hyperlynx Sigrity.
Good exposure to high speed interfaces (SERDES
interfaces up to 100 Gbps) and standards/specifications
for PCIe SATA Ethernet USB HDMI/DP and high speed
memories such as DDR4LPDDR DIMMs & Flash.
Preferred hardware Design knowledge.
Schematic and Layout Review knowledge.